ELSPES Co-Presents Cutting-Edge Glass-Embedded Silicon Capacitor Technology at ECTC 2025
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ELSPES proudly participated in the 2025 IEEE 75th Electronic Components and Technology Conference (ECTC), held from May 27 to 30 in Dallas, Texas, where its collaborative work on glass-embedded silicon chip capacitors for vertical power delivery was officially presented. The research was jointly conducted with leading institutions such as Pennsylvania State University and Georgia Institute of Technology, and was presented by Prof. Madhavan Swaminathan, a globally renowned expert in advanced packaging and power delivery systems.
Key Highlights from the Research: Embedded Silicon Chip Capacitors in Glass Package for Vertical Power Delivery
▶ Achieved ultra-high capacitance density of up to 2,000 nF/mm²
▶ Developed multi-terminal deep-trench Si capacitors with <1 pH ESL and <5 mΩ ESR
▶ Demonstrated advanced glass embedding techniques using stacked vias to reduce parasitic
▶ Validated design through both simulation and experimental measurements
▶ Proposed scalable solutions for 3D-stacked IVRs in high-power data centers
At the conference, Prof. Swaminathan highlighted the growing need for embedded passive devices in next-generation integrated voltage regulators (IVRs) and introduced ELSPES’s innovative approach to reducing parasitic losses through ultra-thin, high-capacitance silicon capacitors embedded directly in glass substrates.
We would like to express our deepest gratitude to Prof. Madhavan Swaminathan for his invaluable contribution and distinguished presentation of our collaborative research at the IEEE ECTC 2025. His expertise and leadership have been instrumental in advancing the field of integrated power delivery systems and in showcasing the potential of glass-embedded silicon capacitor technology on a global stage.
Related Resources
▶ Access the ECTC 2025 Technical Paper (will be linked after publication)
For collaboration inquiries or further technical information, please contact us at sales@elspes.com.
